1. Field of the Invention:
The invention relates to oscillators and more specifically to a phase lock loop utilizing a digital frequency measuring circuit to generate a signal which adjusts the voltage controlled oscillator to the desired frequency and an analog phase lock loop to establish and maintain phase lock.
2. Description of the Prior Art:
In prior art phase lock loops the control signal for the voltage tuned oscillator has traditionally been generated either using all analog or all digital techniques. A typical example of a phase lock system using all digital techniques is disclosed in U.S. Pat. No. 4,099,137. This patent discloses a system in which the output signal of a voltage controlled oscillator is compared to a reference signal to generate control signals for incrementing an up/down counter. The up/down counter controls a random access memory to generate digital signals which are converted to an analog signal to control the voltage controlled oscillator to establish and maintain phase lock. A linear technique for maintaining phase and frequency lock is disclosed in a paper presented by Robert A. Cordell, Jan B. Forney, William N. Dunn and William G. Garrett at the ISSC Conference on Feb. 16, 1979. This technique measures both the frequency and phase of the voltage controlled oscillator to maintain them both locked to a control signal.